Switching

When power up the Juniper ex3400, it just goes w/o chance of getting into rommon, no light at front.


U-Boot 2016.01-rc1 (Sep 01 2016 - 16:00:13 -0700) VERSION=1.3.0

U-Boot code: 1E000000 -> 1E088CC4 BSS: -> 1E0E7FD8
IRQ Stack: 0badc0de
FIQ Stack: 0badc0de
DRAM: et0: gmac_serdes_init read sdctl(0x43)
et0: gmac_serdes_init() serdes_status0: 0x0; serdes_status1: 0xf00
et0: gmac_serdes_init write sdctl(0xf41400)
et0: gmac_serdes_init read sdctl(0xf41400)
et0: gmac_serdes_init write sdctl(0xf41403)
et0: gmac_serdes_init read sdctl(0xf41403)
et0: gmac_serdes_init write sdctl(0xf41400)
et0: gmac_serdes_init read sdctl(0xf41400)
et0: gmac_serdes_init write sdctl(0xf41404)
et0: gmac_serdes_init read sdctl(0xf41404)
et0: gmac_serdes_init write sdctl(0xf4140c)
et0: gmac_serdes_init read sdctl(0xf4140c)
et0: gmac_serdes_init write sdctl(0xf4141c)
et0: gmac_serdes_init read sdctl(0xf4141c)
et0: gmac_serdes_init read sdstat0(0x100ff00); sdstat1(0xf00)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x8000020e
DCO code: 32
=========================================
AVS: 0x0
DEV ID = 0xdc14
SKU ID = 0xb547
DDR type: DDR3
MEMC 0 DDR speed = 750MHz
PHY revision version: 0x00044006
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready...Done.
DDR phy calibration passed
Programming controller register
ddr_init2: MemC initialization complete
Validate Shmoo parameters stored in flash ..... OK
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... failed!
ddr_init2: Calling soc_ddr40_shmoo_ctl
DDR_CTLR_T1
E01. Reset Vref before Shmoo
D04. Calibrate ZQ (ddr40_phy_calib_zq) before Shmoo
D07. VDL Calibration before Shmoo
VDL calibration result: 0x30000003 (cal_steps = 0)
_soc_ddr_shmoo_prepare_for_shmoo: Enter
(WL=0) data = 0x642001
(WL=0) PLL_STATUS : LOCK_LOST = 0x0
(WL=0) PLL_STATUS : LOCK = 0x1
(WL=0) data = 0x1c13000
(WL=0) ZQ_PVT_COMP_CTL : PD_COMP = 0x2
(WL=0) ZQ_PVT_COMP_CTL : ND_COMP = 0x3
(WL=0) data = 0x7
(WL=0) PHY_WORD_LANE_READ_CONTROL : DQ_ODT_ENABLE = 0x1
(WL=0) PHY_WORD_LANE_READ_CONTROL : DQ_ODT_LE_ADJ = 0x1
(WL=0) PHY_WORD_LANE_READ_CONTROL : DQ_ODT_TE_ADJ = 0x1
(WL=0) data = 0x0
(WL=0) VDL_CALIBRATE : CALIB_FAST = 0x0
(WL=0) VDL_CALIBRATE : CALIB_ONCE = 0x0
(WL=0) VDL_CALIBRATE : CALIB_ALWAYS = 0x0
(WL=0) VDL_CALIBRATE : CALIB_TEST = 0x0
(WL=0) VDL_CALIBRATE : CALIB_CLOCKS = 0x0
(WL=0) VDL_CALIBRATE : CALIB_BYTE = 0x0
(WL=0) VDL_CALIBRATE : CALIB_PHYBIST = 0x0
(WL=0) VDL_CALIBRATE : CALIB_FTM = 0x0
(WL=0) VDL_CALIBRATE : CALIB_AUTO = 0x0
(WL=0) VDL_CALIBRATE : CALIB_STEPS = 0x0
(WL=0) VDL_CALIBRATE : CALIB_DQS_PAIR = 0x0
(WL=0) VDL_CALIBRATE : CALIB_DQS_CLOCKS = 0x0
(WL=0) VDL_CALIBRATE : CALIB_BIT_OFFSET = 0x0
(WL=0) VDL_CALIBRATE : RD_EN_CAL = 0x0
(WL=0) VDL_CALIBRATE : BIT_CAL = 0x0
(WL=0) VDL_CALIBRATE : SET_MR_MPR = 0x0
(WL=0) VDL_CALIBRATE : DQ0_ONLY = 0x0
(WL=0) VDL_CALIBRATE : SET_WR_DQ = 0x0
(WL=0) VDL_CALIBRATE : BIT_REFRESH = 0x0
(WL=0) VDL_CALIBRATE : RD_DLY_CAL = 0x0
(WL=0) VDL_CALIBRATE : EXIT_IN_SR = 0x0
(WL=0) VDL_CALIBRATE : SKIP_RST = 0x0
(WL=0) VDL_CALIBRATE : AUTO_INIT = 0x0
(WL=0) VDL_CALIBRATE : USE_STRAPS = 0x0
(WL=0) data = 0x30000003
(WL=0) VDL_CALIB_STATUS : CALIB_LOCK = 0x1
(WL=0) VDL_CALIB_STATUS : CALIB_IDLE = 0x1
(WL=0) VDL_CALIB_STATUS : CALIB_BYTE_SEL = 0x0
(WL=0) VDL_CALIB_STATUS : CALIB_BIT_OFFSET set if byte mode = 0x0
(WL=0) NOTE: For single step calibration total result, please see below
(WL=0) data = 0x19f198f
(WL=0) VDL_DQ_CALIB_STATUS : DQ_CALIB_LOCK = 0x1
(WL=0) VDL_DQ_CALIB_STATUS : DQS_CALIB_LOCK = 0x1
(WL=0) VDL_DQ_CALIB_STATUS : DQS_CALIB_MODE DQS(1=pair) = 0x1
(WL=0) VDL_DQ_CALIB_STATUS : DQS_CALIB_CLOCKS DQS(0=half bit) = 0x1
(WL=0) VDL_DQ_CALIB_STATUS : DQ_CALIB_TOTAL DQ (steps) = 0x19
(WL=0) VDL_DQ_CALIB_STATUS : DQS_CALIB_TOTAL DQS (steps) = 0x19
(WL=0) data = 0x1951
(WL=0) VDL_WR_CHAN_CALIB_STATUS : WR_CHAN_CALIB_LOCK = 0x1
(WL=0) VDL_WR_CHAN_CALIB_STATUS : WR_CHAN_CALIB_BYTE_SEL (1=byte) = 0x0
(WL=0) VDL_WR_CHAN_CALIB_STATUS : WR_CHAN_CALIB_CLOCKS (0=1/2bit) = 0x0
(WL=0) VDL_WR_CHAN_CALIB_STATUS : WR_CHAN_CALIB_TOTAL (steps) = 0x19
(WL=0) VDL_WR_CHAN_CALIB_STATUS : WR_CHAN_CALIB_BIT_OFFSET (in byte mode, setting for bit vdl)= 0x0
(WL=0) data = 0x3cb5
(WL=0) VDL_RD_EN_CALIB_STATUS : RD_EN_CALIB_LOCK = 0x1
(WL=0) VDL_RD_EN_CALIB_STATUS : RD_EN_CALIB_BYTE_SEL (1=byte) = 0x0
(WL=0) VDL_RD_EN_CALIB_STATUS : RD_EN_CALIB_CLOCKS (0=1/2bit) = 0x1
(WL=0) VDL_RD_EN_CALIB_STATUS : RD_EN_CALIB_TOTAL (steps) = 0x3c
(WL=0) VDL_RD_EN_CALIB_STATUS : RD_EN_CALIB_BIT_OFFSET (in byte mode, setting for bit vdl)= 0x0
(WL=0) VDL_CALIB_STATUS : NOT CALIB_LOCK
-----------------------------------------
--- Single STEP Calibration ---
-----------------------------------------
(WL=0) VDL_CALIB_STATUS : CALIB_LOCK = 1
(WL=0) VDL_CALIB_STATUS : CALIB_IDLE = 1
(WL=0) VDL_CALIB_STATUS : 360'CALIB_TOTAL = 140 (steps)
(WL=0) VDL_CALIB_STATUS : 90' CALIB TOTAL = 35 (steps)
(WL=0) VDL_CALIB_STATUS : 360' steps time = 1333 (ps)
(WL=0) VDL_CALIB_STATUS : 90' step time = 38.85 (ps)
(WL=0) VDL_CALIB_STATUS : Single step time = 9.521 (ps)
sizeof(soc_ddr_shmoo_param_t) = 29c
sal_memset
sizeof(vref_word_shmoo) = 12b00
BEGIN SHMOO
BEFORE SHMOO: Type = 0 CI = 0 WL = 0
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0360 Data = 0x00000004 READ DATA DLY
Address = 0x0200 Data = 0x0001001F VDL OVRIDE BYTE RD EN
Address = 0x0274 Data = 0x0001001F VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0314 Data = 0x0001001F VDL OVRIDE BYTE1 BIT RD EN
Address = 0x0234 Data = 0x00010009 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x02D4 Data = 0x00010000 VDL OVRIDE BYTE1 BIT0 R DQ
Address = 0x0208 Data = 0x00010020 VDL OVRIDE BYTE0 R DQS
Address = 0x02A8 Data = 0x0001001B VDL OVRIDE BYTE1 R DQS
Address = 0x0204 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0210 Data = 0x0001001C VDL OVRIDE BYTE0 BIT WR DQ
Address = 0x02A4 Data = 0x00010000 VDL OVRIDE BYTE1 WR DQ
Address = 0x02B0 Data = 0x0001001B VDL OVRIDE BYTE1 BIT WR DQ
calib_steps: 611
AFTER SHMOO: Type = 0 CI = 0 WL = 0
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0360 Data = 0x00000001 READ DATA DLY
Address = 0x0200 Data = 0x0001001E VDL OVRIDE BYTE RD EN
Address = 0x0274 Data = 0x0001001E VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0314 Data = 0x0001001E VDL OVRIDE BYTE1 BIT RD EN
Address = 0x0234 Data = 0x00010019 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x02D4 Data = 0x00010019 VDL OVRIDE BYTE1 BIT0 R DQ
Address = 0x0208 Data = 0x00010032 VDL OVRIDE BYTE0 R DQS
Address = 0x02A8 Data = 0x00010032 VDL OVRIDE BYTE1 R DQS
Address = 0x0204 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0210 Data = 0x00010019 VDL OVRIDE BYTE0 BIT WR DQ
Address = 0x02A4 Data = 0x00010000 VDL OVRIDE BYTE1 WR DQ
Address = 0x02B0 Data = 0x00010019 VDL OVRIDE BYTE1 BIT WR DQ

BEFORE SHMOO: Type = 0 CI = 0 WL = 1
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0560 Data = 0x00000004 READ DATA DLY
Address = 0x0400 Data = 0x0001002A VDL OVRIDE BYTE RD EN
Address = 0x0474 Data = 0x0001002A VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0514 Data = 0x0001002A VDL OVRIDE BYTE1 BIT RD EN
Address = 0x0434 Data = 0x00010010 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x04D4 Data = 0x00010000 VDL OVRIDE BYTE1 BIT0 R DQ
Address = 0x0408 Data = 0x00010022 VDL OVRIDE BYTE0 R DQS
Address = 0x04A8 Data = 0x0001001A VDL OVRIDE BYTE1 R DQS
Address = 0x0404 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0410 Data = 0x0001001F VDL OVRIDE BYTE0 BIT WR DQ
Address = 0x04A4 Data = 0x00010000 VDL OVRIDE BYTE1 WR DQ
Address = 0x04B0 Data = 0x0001001A VDL OVRIDE BYTE1 BIT WR DQ
calib_steps: 611
AFTER SHMOO: Type = 0 CI = 0 WL = 1
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0560 Data = 0x00000001 READ DATA DLY
Address = 0x0400 Data = 0x0001001E VDL OVRIDE BYTE RD EN
Address = 0x0474 Data = 0x0001001E VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0514 Data = 0x0001001E VDL OVRIDE BYTE1 BIT RD EN
Address = 0x0434 Data = 0x00010019 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x04D4 Data = 0x00010019 VDL OVRIDE BYTE1 BIT0 R DQ
Address = 0x0408 Data = 0x00010032 VDL OVRIDE BYTE0 R DQS
Address = 0x04A8 Data = 0x00010032 VDL OVRIDE BYTE1 R DQS
Address = 0x0404 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0410 Data = 0x00010019 VDL OVRIDE BYTE0 BIT WR DQ
Address = 0x04A4 Data = 0x00010000 VDL OVRIDE BYTE1 WR DQ
Address = 0x04B0 Data = 0x00010019 VDL OVRIDE BYTE1 BIT WR DQ

BEFORE SHMOO: Type = 0 CI = 0 WL = 2
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0760 Data = 0x00000004 READ DATA DLY
Address = 0x0600 Data = 0x00010030 VDL OVRIDE BYTE RD EN
Address = 0x0674 Data = 0x00010030 VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0634 Data = 0x00010000 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x0608 Data = 0x00010020 VDL OVRIDE BYTE0 R DQS
Address = 0x0604 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0610 Data = 0x00010019 VDL OVRIDE BYTE0 BIT WR DQ
calib_steps: 611
AFTER SHMOO: Type = 0 CI = 0 WL = 2
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0760 Data = 0x00000001 READ DATA DLY
Address = 0x0600 Data = 0x0001001E VDL OVRIDE BYTE RD EN
Address = 0x0674 Data = 0x0001001E VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0634 Data = 0x00010019 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x0608 Data = 0x00010032 VDL OVRIDE BYTE0 R DQS
Address = 0x0604 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0610 Data = 0x00010019 VDL OVRIDE BYTE0 BIT WR DQ

BEFORE SHMOO: Type = 1 CI = 0 WL = 0
Address = 0x004C Data = 0x30000233 VDL CALIB STATUS
Address = 0x0058 Data = 0x00003CB4 VDL RD EN CALIB STATUS
Address = 0x0050 Data = 0x019F198C VDL DQ/DQS CALIB STATUS
Address = 0x0054 Data = 0x00001950 VDL WR DQ CALIB STATUS
Address = 0x0030 Data = 0x00000000 VDL OVRIDE BYTE CTL
Address = 0x0034 Data = 0x00010028 VDL OVRIDE BIT CTL
Address = 0x003C Data = 0x01C13000 ZQ PVT COMP CTL
Address = 0x006C Data = 0x00000820 VREF DAC CONTROL
Address = 0x0360 Data = 0x00000001 READ DATA DLY
Address = 0x0200 Data = 0x0001001E VDL OVRIDE BYTE RD EN
Address = 0x0274 Data = 0x0001001E VDL OVRIDE BYTE0 BIT RD EN
Address = 0x0314 Data = 0x0001001E VDL OVRIDE BYTE1 BIT RD EN
Address = 0x0234 Data = 0x00010019 VDL OVRIDE BYTE0 BIT0 R DQ
Address = 0x02D4 Data = 0x00010019 VDL OVRIDE BYTE1 BIT0 R DQ
Address = 0x0208 Data = 0x00010032 VDL OVRIDE BYTE0 R DQS
Address = 0x02A8 Data = 0x00010032 VDL OVRIDE BYTE1 R DQS
Address = 0x0204 Data = 0x00010000 VDL OVRIDE BYTE0 WR DQ
Address = 0x0210 Data = 0x00010019 VDL OVRIDE BYTE0 BIT WR DQ
Address = 0x02A4 Data = 0x00010000 VDL OVRIDE BYTE1 WR DQ
Address = 0x02B0 Data = 0x00010019 VDL OVRIDE BYTE1 BIT WR DQ
RD_DATA_DLY Iter: 1 ----------------------------------------------------------------
RD_DATA_DLY Iter: 1 Count: 0 Sum: 0
RD_DATA_DLY Iter: 2 ----------------------------------------------------------------
RD_DATA_DLY Iter: 2 Count: 0 Sum: 0
RD_DATA_DLY Iter: 3 ----------------------------------------------------------------
RD_DATA_DLY Iter: 3 Count: 0 Sum: 0
RD_DATA_DLY Iter: 4 ----------------------------------------------------------------
RD_DATA_DLY Iter: 4 Count: 0 Sum: 0
RD_DATA_DLY Iter: 5 ----------------------------------------------------------------
RD_DATA_DLY Iter: 5 Count: 0 Sum: 0
RD_DATA_DLY Iter: 6 ----------------------------------------------------------------
RD_DATA_DLY Iter: 6 Count: 0 Sum: 0
RD_DATA_DLY Iter: 7 ----------------------------------------------------------------
RD_DATA_DLY Iter: 7 Count: 0 Sum: 0
Did not find valid RD_DATA_DELAY. Forcing RD_DATA_DELAY = 4
Switching to RD_DATA_DELAY Step : 4 (WL = 0)
Switching to RD_DQ Step (Byte 0) : 0
Switching to RD_DQ Step (Byte 1) : 0
AFTER SHMOO: Type = 1 CI = 0 WL = 0